EmbeddingGemma 2: an open, lightweight multimodal embedding model
deepmind.google·6d ago
AI Engineering
Lobsters·10d ago·5 min read
Schedules Are Solvable Symbols: Tuning-Free Compilation of Tile Programs on Dataflow Architectures
TL;DR
Loom is a tuning-free symbolic compiler framework designed for tile-based SPMD programs on spatial dataflow architectures, achieving performance that matches or exceeds vendor-optimized libraries. It enables predictable scheduling without the need for extensive profiling or tuning.
✦ Why It Matters
Consider adopting Loom for your tile-based SPMD programs to simplify compilation and improve performance without extensive tuning.
Key Takeaways
- Explore Loom for efficient compilation of tile-based SPMD programs.
- Utilize symbolic compilation to avoid extensive profiling.
- Leverage Loom's performance on Tenstorrent hardware for key algorithms.
- Consider the implications of hardware-derived symbolic compilation for future projects.
Full Summary
Modern AI and high-performance computing (HPC) accelerators utilize dataflow features that allow for efficient data movement and scheduling, shifting the responsibility from hardware to the compiler. Loom addresses the challenge of achieving high performance on these architectures by treating tile-based single program multiple data (SPMD) compilation as a static optimization problem.
It systematically explores spatial mapping and communication options while keeping certain parameters symbolic. By deriving legality constraints and latency expressions from hardware descriptions, Loom formulates a constraint programming satisfiability (CP-SAT) problem for each scheduling candidate.
On two generations of Tenstorrent hardware, Loom demonstrated performance that matches or exceeds the vendor-optimized TTNN library for tasks like GEMM and Flash Attention, all without requiring per-shape profiling. This suggests that symbolic compilation can serve as a robust alternative to traditional profiling-based tuning methods, making it easier to adapt across different architectures.