
TL;DR
An experiment comparing RISC-V and ARM architectures using the chibicc C compiler revealed similar results in dynamic instruction count and code density. The focus on unoptimized scalar implementations helped isolate the performance of the base ISAs.
✦ Why It Matters
Consider testing both RISC-V and ARM for your next project to evaluate performance trade-offs.
Key Takeaways
Full Summary
The experiment aimed to compare the RISC-V and ARM instruction set architectures (ISAs) using the chibicc C compiler as a benchmark. By compiling the codebase and excluding SIMD instructions, the study focused on dynamic instruction count and code density.
Results showed that RISC-V binaries were approximately 18% smaller than ARM binaries, with RVA23 fetching 24% fewer bytes than ARMv9. Although ARMv9 had a lower instruction count, it required more micro-operations due to complex addressing modes.
Both RVA22 and RVA23 executed faster than ARMv9 in the GEM5 simulator, despite GCC binaries outperforming Clang binaries. The findings suggest that RISC-V's compressed instruction encoding offers advantages in code density, while ARM's complexity leads to a higher uop count.
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